Jtag

Principles of JTAG

JTAG devised uses boundary-scan technology to communicate with the world. The boundary-scan control signals, collectively referred to as the Test Access Port (TAP), define a serial protocol for scan-based devices. There are five pins:

  • TCK — clock synchronizes the internal state machine operations.
  • TMS — mode select is sampled at the rising edge of TCK to determine the next state.
  • TDI — data in is sampled at the rising edge of TCK and shifted into the device's test or programming logic when the internal state machine is in the correct state.
  • TDO — data out represents the data shifted out of the device's test or programming logic and is valid on the falling edge of TCK when the internal state machine is in the correct state.
  • TRST — reset (optional), when driven low, resets the internal state machine.

The TCK, TMS, and TRST input pins drive a 16-state TAP controller state machine. The TAP controller manages the exchange of data and instructions. The controller advances to the next state based on the value of the TMS signal at each rising edge of TCK.

Test Process of JTAG

  • The tester applies test or diagnostic data on the input pins of the device.
  • The boundary-scan cells capture the data in the boundary scan registers monitoring the input pins.
  • Data is scanned out of the device via the TDO pin, for verification.
  • Data can then be scanned into the device via the TDI pin.
  • The tester can then verify data on the output pins of the device.

Notes

  • JTAG can be used for flash programming. For example, it can load the bootloader into flash memory of a embedded device. After that, CPU can start to execute the bootloader's codes.

References

http://www.embedded.com/story/OEG20021028S0049

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