Spi Setup

C

#include <arch\philips\lpc2103_k9supd.h>
#include "coridium.h"
void Initialize(void); 
 
int main() 
{ 
      Initialize(); 
 
      /* Do forever */ 
      while(1) 
      { 
            /* Write data 0xA2 out */ 
            S0SPDR=0xA2; 
 
            /* Wait for transfer to be completed */ 
            while((S0SPSR & 0x80) == 0){} 
      }  
} 
 
void Initialize() 
{ 
      /* Select pins for SPI */     
      PINSEL0=0x5500; 
 
      /* Set peripheral clock to same as system clock */  
      APBDIV=0x01; 
 
      /* Set the speed of SPI to 1.25 MHz */ 
      S0SPCCR=0x08; 
 
      /* Device selected as master */ 
      S0SPCR=0x20; 
}

ARM Assembly

        .text
        .equ        PINSEL0, 0xE002C000
        .equ        APBDIV, 0xE01FC100
        .equ        S0SPDR, 0xE0020008
        .equ        S0SPSR, 0xE0020004
        .equ        S0SPCCR, 0xE002000C
        .equ        S0SPCR, 0xE0020000
        .equ        DATA, 0xA2
 
_start: .global _start
        .global     main
        .global     UNDEF_Routine
        .global     SWI_Routine
        .global     PAbt_Routine
        .global     DAbt_Routine
        .global     FIQ_Routine
        b        main
 
UNDEF_Routine:
SWI_Routine:
PAbt_Routine:
DAbt_Routine:
FIQ_Routine:
 
main:
        bl        INITIALIZE
infinite:
        ldr        r2, =S0SPDR
        ldr        r1, =DATA
        str        r1, [r2, #0]
 
        ldr        r1, =S0SPSR    
waitempty:     
        ldr        r2, [r1, #0]
        mov           r3, #1
        and        r2, r3, LSL #7
        cmp        r2, #0
        bne        infinite
        b          waitempty
 
INITIALIZE: 
        ldr        r2, =PINSEL0
        mov        r1, #0x5500    
        str        r1, [r2, #0]
 
        ldr        r2, =APBDIV
        mov        r1, #0x01
        str        r1, [r2, #0]
 
        ldr        r2, =S0SPCCR
        mov        r1, #0x08
        str        r1, [r2, #0]
 
        ldr        r2, =S0SPCR
        mov        r1, #0x20
        str        r1, [r2, #0]
 
        mov     pc, lr
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